Port Controllers for a Gals Implementation of a 2-d Dct Processor
نویسندگان
چکیده
This paper describes an implementation of a 2-dimensional DCT processor and shows that the Globally Asynchronous Locally Synchronous (GALS) approach is highly suitable for implementation of such processors. Primarily the GALS approach increases the design efficiency by supporting the divide-and-conquer approach. The port controllers described uses standard cells to minimize the design effort when migrating between CMOS processes. The port controllers has been tested in an FPGA.
منابع مشابه
GALS Implementation of a 2-D DCT Processor
This paper describes an implementation of a 2-dimensional DCT processor and shows that the Globally Asynchronous Locally Synchronous (GALS) approach is highly suitable for implementation of such processors. Primarily the GALS approach increases the design efficiency by using the divide-and-conquer approach. Simulation results on the port controller are presented.
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